From: Aleksander Jan Bajkowski olek2@wp.pl
[ Upstream commit b0d04fe6a633ada2c7bc1b5ddd011cbd85961868 ]
Bindig requires a node name matching ‘^gpio@[0-9a-f]+$’. This patch changes the clock name from “stp” to “gpio”.
Signed-off-by: Aleksander Jan Bajkowski olek2@wp.pl Signed-off-by: Thomas Bogendoerfer tsbogend@alpha.franken.de Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
YES
- What changed: In `arch/mips/lantiq/xway/sysctrl.c:488`, the PMU clock lookup key was renamed from `"1e100bb0.stp"` to `"1e100bb0.gpio"` while keeping the same gating bits (`PMU_STP`). This aligns the clkdev `dev_id` with the DT-derived device name. - Why it matters: The STP GPIO controller driver requests its clock via `devm_clk_get_enabled(&pdev->dev, NULL)` and fails if no clkdev mapping matches the platform device’s name. See `drivers/gpio/gpio- stp-xway.c:299-303` where it logs “Failed to get clock” and aborts probe on error. - Binding and DT consistency: The binding requires a node name `^gpio@[0-9a-f]+$`. In-tree DTS already uses `gpio@e100bb0` for this block (e.g., `arch/mips/boot/dts/lantiq/danube_easy50712.dts:99`), which yields a platform device name akin to `"1e100bb0.gpio"`. Without this patch, the clkdev key `"1e100bb0.stp"` doesn’t match, causing clock lookup to fail and the driver to not probe. - User-visible impact fixed: Without the clock, the STP GPIO (used for driving LED shift registers and similar) fails to initialize, breaking GPIO/LED functionality on affected Lantiq XWAY SoCs. - Scope and risk: This is a one-line, self-contained rename that: - Leaves the actual gating (`PMU_STP`) unchanged. - Touches only the Lantiq XWAY sysctrl init path (`ltq_soc_init`). - Has no architectural changes and no side effects beyond fixing the name mismatch. - Regression considerations: The only potential risk would be out-of- tree DTS using a legacy `stp@...` node name (contrary to the binding). In-tree DTS already uses `gpio@...`, so backporting aligns kernel and DT as per the binding and avoids breakage with current trees. - Stable criteria fit: - Fixes a real bug affecting users (driver probe/clock enable failure). - Minimal, targeted change; no new features or ABI changes. - Confined to MIPS Lantiq subsystem; low regression risk.
Conclusion: Backporting is appropriate to restore correct clock lookup and driver probe behavior on Lantiq XWAY platforms using DTs that follow the binding.
arch/mips/lantiq/xway/sysctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c index 6031a0272d874..d9aa80afdf9d6 100644 --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c @@ -485,7 +485,7 @@ void __init ltq_soc_init(void) /* add our generic xway clocks */ clkdev_add_pmu("10000000.fpi", NULL, 0, 0, PMU_FPI); clkdev_add_pmu("1e100a00.gptu", NULL, 1, 0, PMU_GPT); - clkdev_add_pmu("1e100bb0.stp", NULL, 1, 0, PMU_STP); + clkdev_add_pmu("1e100bb0.gpio", NULL, 1, 0, PMU_STP); clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1); clkdev_add_pmu("1e104100.dma", NULL, 1, 0, PMU_DMA); clkdev_add_pmu("1e100800.spi", NULL, 1, 0, PMU_SPI);