From: Mangesh Gadre Mangesh.Gadre@amd.com
[ Upstream commit 01fa9758c8498d8930df56eca36c88ba3e9493d4 ]
Initialize jpeg v5_0_1 ras function
Signed-off-by: Mangesh Gadre Mangesh.Gadre@amd.com Reviewed-by: Stanley.Yang Stanley.Yang@amd.com Reviewed-by: Tao Zhou tao.zhou1@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
YES
- What it changes - Adds RAS registration for JPEG v5.0.1 during SW init, guarded by capability check: calls `amdgpu_jpeg_ras_sw_init(adev)` when `amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)` is true, and bails out on error. This mirrors how other JPEG IP versions do RAS init.
- Why it’s a bugfix - JPEG v5.0.1 already wires up RAS infrastructure but never registers the RAS block, so poison error handling does not activate: - Poison IRQ sources are defined and added (drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:149 and drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:156). - IRQ funcs and poison IRQ funcs are set (drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:924 and drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:919). - A JPEG-specific RAS late-init is implemented and would enable the poison IRQ via `amdgpu_irq_get` (drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:1061), but it only runs if the RAS block is registered. - Without registering the RAS block in SW init, late-init never runs, so poison IRQs are never enabled and `adev->jpeg.ras_if` remains unset; the poison handler early-outs (drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c:268). - Additionally, `jpeg_v5_0_1_hw_fini()` unconditionally disables the poison IRQ when RAS is supported (drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:310), calling `amdgpu_irq_put` without a prior `amdgpu_irq_get` can trigger WARNs (see `amdgpu_irq_put` checks in drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c:608). Registering RAS ensures late-init balances `get/put`.
- Established precedent and consistency - Other JPEG IPs already perform this RAS registration in SW init, e.g.: - JPEG v4.0.3: calls `amdgpu_jpeg_ras_sw_init` under the same guard (drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c:207). - JPEG v4.0: unconditionally calls `amdgpu_jpeg_ras_sw_init` (drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c:138). - The RAS registration function is already present and standard (drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c:311).
- Scope and risk - Change is small and localized to JPEG v5.0.1 SW init. - Runs only when RAS is supported on the device (`amdgpu_ras_is_supported` guard), reducing regression risk on other configurations. - No architectural changes; it brings v5.0.1 in line with existing JPEG generations. - The only behavioral change is that if RAS registration fails, JPEG init now fails (as it already does for other JPEG IPs). This is typical and desirable for critical error-handling infrastructure.
- User impact - Fixes missing RAS enablement: poison error reporting/handling and ACA binding (drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c:1068) now work for JPEG v5.0.1. - Prevents potential WARNs from unbalanced IRQ enable/disable paths on RAS-capable hardware.
- Stable backport suitability - Fixes a real functional gap in error handling on supported hardware. - Minimal and self-contained, consistent with stable rules. - No new features or ABI changes; guarded by capability checks.
Given the above, this is a straightforward, low-risk bugfix that aligns v5.0.1 with other JPEG IP versions and should be backported.
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c index 03ec4b741d194..8d74455dab1e2 100644 --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c @@ -196,6 +196,14 @@ static int jpeg_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block) } }
+ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)) { + r = amdgpu_jpeg_ras_sw_init(adev); + if (r) { + dev_err(adev->dev, "Failed to initialize jpeg ras block!\n"); + return r; + } + } + r = amdgpu_jpeg_reg_dump_init(adev, jpeg_reg_list_5_0_1, ARRAY_SIZE(jpeg_reg_list_5_0_1)); if (r) return r;