From: Marcos Del Sol Vives marcos@orca.pet
[ Upstream commit ebc7086b39e5e4f3d3ca82caaea20538c9b62d42 ]
RDC PCI to PCIe bridges, present on Vortex86DX3 and Vortex86EX2 SoCs, do not support MSIs. If enabled, interrupts generated by PCIe devices never reach the processor.
I have contacted the manufacturer (DM&P) and they confirmed that PCI MSIs need to be disabled for them.
Signed-off-by: Marcos Del Sol Vives marcos@orca.pet Signed-off-by: Bjorn Helgaas bhelgaas@google.com Link: https://patch.msgid.link/20250705233209.721507-1-marcos@orca.pet Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
YES
Reasons this is a good stable backport candidate
- Fixes a real hardware bug: The commit message states RDC PCI→PCIe bridges “do not support MSIs” and that when enabled, “interrupts generated by PCIe devices never reach the processor.” That is a functional breakage for devices behind these bridges, not a feature change.
- Minimal, targeted change: The patch adds a single quirk line to disable MSI only behind the affected bridge: - Adds: DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RDC, 0x1031, quirk_disable_msi); in drivers/pci/quirks.c next to other vendor-specific MSI-disable quirks such as AMD/VIA/ATI (drivers/pci/quirks.c:2717-2719). - The quirk uses existing helper quirk_disable_msi() (drivers/pci/quirks.c:2710), which only sets a flag on the subordinate bus if the device is a bridge: - Sets bus flag: dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; - The function is compiled under CONFIG_PCI_MSI (drivers/pci/quirks.c:2686), so it is inert if MSI is not enabled.
- Correct mechanism and stage: - Bus-level gating is the standard way to suppress MSI/MSI-X behind a broken bridge. The MSI core checks this flag up the bus hierarchy and refuses to enable MSI/MSI-X when set (drivers/pci/msi/msi.c:62). - The flag used is the canonical one (include/linux/pci.h:259), and the vendor macro is already present (include/linux/pci_ids.h:2412). - Uses DECLARE_PCI_FIXUP_FINAL(), consistent with other similar quirks (drivers/pci/quirks.c:2717-2719), so it runs late enough to have a subordinate bus to mark and before drivers enable MSI.
- Scope-limited and precedent: - Only affects devices with vendor RDC and device ID 0x1031, and only if they are bridges (quirk_disable_msi() early-exits otherwise; drivers/pci/quirks.c:2712). - Mirrors long-standing patterns for known-broken bridges (e.g., AMD 8131, VIA, ATI entries at drivers/pci/quirks.c:2717-2719).
- Risk assessment: - Primary effect is that devices behind the affected bridge will use INTx instead of MSI/MSI-X. That may reduce performance but restores correctness (avoids lost interrupts). If a device strictly requires MSI/MSI-X, it could not have worked reliably on this hardware anyway, so the quirk does not introduce a new regression in practice. - No architectural changes, no API changes, no cross-subsystem impact; single-file quirk addition under an existing guard.
- Stable policy fit: - Hardware workarounds that fix real user-visible bugs are routinely backported. - The change is small, well-scoped, and follows existing patterns. - While there is no explicit “Cc: stable” in the provided message, this class of PCI quirks is commonly accepted for stable.
Conclusion
- Backport Status: YES. This one-line quirk reliably prevents MSI/MSI-X enablement behind RDC bridges known to drop MSI interrupts, restoring device functionality with minimal risk.
drivers/pci/quirks.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index d97335a401930..6eb3d20386e95 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2717,6 +2717,7 @@ static void quirk_disable_msi(struct pci_dev *dev) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0xa238, quirk_disable_msi); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x5a3f, quirk_disable_msi); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RDC, 0x1031, quirk_disable_msi);
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