On Mon, Jan 22, 2018 at 7:18 AM, Benjamin Beckmeyer beckmeyer.b@rittal.de wrote:
I tested it a few moments ago and to make it short: it doesn't work.
Annoying ... since the i.MX and x86 PCI version so clearly differs here I'm left to trial and error over the mailing list.
mmc1 bounce up to 128 segments into one, max segment size 65536 bytes mmc1: SDHCI controller on 53fb8000.esdhc [53fb8000.esdhc] using DMA
Could it be that this SDMA has this problem of not being able to send things aligned on even 64K pages? (Off-by-one error in the hardware.)
Could you try this on top of the patch?
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 25b5e598ee6d..6b436f0e0925 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3323,7 +3323,7 @@ static int sdhci_allocate_bounce_buffer(struct sdhci_host *host) * has diminishing returns, this is probably because SD/MMC * cards are usually optimized to handle this size of requests. */ - bounce_size = SZ_64K; + bounce_size = SZ_64K-1; /* * Adjust downwards to maximum request size if this is less * than our segment size, else hammer down the maximum
The code should report that it bounces 127 segments into 1 instead.
Yours, Linus Walleij