On Wed, 13 Nov 2024 00:05:08 -0800, Qiang Yu wrote:
As per memory map table, the region for PCIe6a is 64MByte. Hence, set the size of 32 bit non-prefetchable memory region beginning on address 0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be allocated from 0x70300000 to 0x74000000.
Applied, thanks!
[1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a commit: fb8e7b33c2174e00dfa411361eeed21eeaf3634b
Best regards,