From: Ausef Yousof Ausef.Yousof@amd.com
[ Upstream commit 895b61395eefd28376250778a741f11e12715a39 ]
[why&how] control flag for the wait during pipe update wait for vupdate should be set if update type is not fast or med to prevent an invalid sleep operation
Reviewed-by: Alvin Lee alvin.lee2@amd.com Signed-off-by: Ausef Yousof Ausef.Yousof@amd.com Signed-off-by: Wayne Lin wayne.lin@amd.com Tested-by: Dan Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
YES
- What it fixes: Prevents sleeping in interrupt/atomic context during medium (MED) updates by avoiding a vupdate wait when the update is not FULL. This addresses “invalid sleep” risks during medupdate/highirq paths.
- Change summary: The wait decision flag passed to the hardware sequencer changes from only FAST to FAST or MED: - `drivers/gpu/drm/amd/display/dc/core/dc.c:4173` now passes `update_type < UPDATE_TYPE_FULL` instead of `update_type == UPDATE_TYPE_FAST`.
- Why this matters: The wait routine will sleep via `fsleep()` when it decides to wait. Sleeping is not allowed at high IRQ levels or atomic contexts. MED updates are documented as ISR‑safe (i.e., they can occur in interrupt context), so they must not trigger sleeps. - Update type semantics: `drivers/gpu/drm/amd/display/dc/dc.h:453` (FAST “safe to execute in isr”), `drivers/gpu/drm/amd/display/dc/dc.h:454` (MED “ISR safe”), `drivers/gpu/drm/amd/display/dc/dc.h:455` (FULL “cannot be done at ISR level”).
- Actual wait behavior: The wait function only sleeps when it’s safe; the third argument tells it to skip the sleep for ISR‑safe paths: - Function definition: `drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c:101` - Core logic: If `is_surface_update_only` is true and the computed wait is long, it returns early without sleeping, deferring the wait: - Early return guard: `drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c:157` - Sleep call (which we avoid in ISR context): `drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c:163`
- Correctness and safety: For FULL updates, the code still treats the path as non‑ISR and uses the wait normally. Example full‑update path calls the wait with “false”: - `drivers/gpu/drm/amd/display/dc/core/dc.c:2146` - FULL updates explicitly set up the “wait required” state later when appropriate: - `drivers/gpu/drm/amd/display/dc/core/dc.c:4326`
- Side‑effects and risk: Minimal. This is a one‑line, scoped change that: - Avoids an invalid sleep during MED updates while preserving FULL update behavior. - Defers waiting by keeping `pipe_ctx->wait_is_required` set when skipping, so the wait happens later in a safe context (per `drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c:159`).
- Scope: Confined to AMD display DC commit path; no architectural/API changes.
- Stable backport criteria: Satisfies important bugfix (avoids sleeping in IRQ), small and contained change, low regression risk, no new features, and limited to a driver subsystem.
Given the above, this is a solid candidate for stable backport.
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 2d2f4c4bdc97e..74efd50b7c23a 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -4163,7 +4163,7 @@ static void commit_planes_for_stream(struct dc *dc, }
if (dc->hwseq->funcs.wait_for_pipe_update_if_needed) - dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, top_pipe_to_program, update_type == UPDATE_TYPE_FAST); + dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, top_pipe_to_program, update_type < UPDATE_TYPE_FULL);
if (should_lock_all_pipes && dc->hwss.interdependent_update_lock) { if (dc->hwss.subvp_pipe_control_lock)