From: Dmitry Baryshkov dmitry.baryshkov@linaro.org
[ Upstream commit bb5009a24ec3f2f2ec1e2ed7b8a5dcde9a9e28d9 ]
Define USB3 QMP PHY presend on the SDM630 / SDM660 platforms. Enable it by default in the USB3 host, but (for compatibility), force USB 2.0 mode for all defined boards. The boards should opt-in to enable USB 3.0 support.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org Reviewed-by: Konrad Dybcio konrad.dybcio@linaro.org Link: https://lore.kernel.org/r/20240116-sdm660-usb3-support-v1-3-2fbd683aea77@lin... Signed-off-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 6 ++++ .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 6 ++++ arch/arm64/boot/dts/qcom/sdm630.dtsi | 36 ++++++++++++++----- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 6 ++++ 4 files changed, 46 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts index 2ed39d402d3f6..21fae799c816a 100644 --- a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts @@ -454,10 +454,16 @@ &usb2_dwc3 { };
&usb3 { + qcom,select-utmi-as-pipe-clk; + status = "okay"; };
&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + dr_mode = "peripheral"; extcon = <&extcon_usb>; }; diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 87d0293c728d8..f06a9f0cf97c1 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -658,10 +658,16 @@ cam_vdig_default: cam-vdig-default-state { };
&usb3 { + qcom,select-utmi-as-pipe-clk; + status = "okay"; };
&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + dr_mode = "peripheral"; extcon = <&extcon_usb>; }; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 513fe5e76b688..28489fb58b200 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1286,7 +1286,6 @@ usb3: usb@a8f8800 { interrupt-names = "hs_phy_irq", "ss_phy_irq";
power-domains = <&gcc USB_30_GDSC>; - qcom,select-utmi-as-pipe-clk;
resets = <&gcc GCC_USB_30_BCR>;
@@ -1297,17 +1296,38 @@ usb3_dwc3: usb@a800000 { snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk;
- /* - * SDM630 technically supports USB3 but I - * haven't seen any devices making use of it. - */ - maximum-speed = "high-speed"; - phys = <&qusb2phy0>; - phy-names = "usb2-phy"; + phys = <&qusb2phy0>, <&usb3_qmpphy>; + phy-names = "usb2-phy", "usb3-phy"; snps,hird-threshold = /bits/ 8 <0>; }; };
+ usb3_qmpphy: phy@c010000 { + compatible = "qcom,sdm660-qmp-usb3-phy"; + reg = <0x0c010000 0x1000>; + + clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, + <&gcc GCC_USB3_CLKREF_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "aux", + "ref", + "cfg_ahb", + "pipe"; + clock-output-names = "usb3_phy_pipe_clk_src"; + #clock-cells = <0>; + #phy-cells = <0>; + + resets = <&gcc GCC_USB3_PHY_BCR>, + <&gcc GCC_USB3PHY_PHY_BCR>; + reset-names = "phy", + "phy_phy"; + + qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>; + + status = "disabled"; + }; + qusb2phy0: phy@c012000 { compatible = "qcom,sdm660-qusb2-phy"; reg = <0x0c012000 0x180>; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 3c47410ba94c0..7167f75bced3f 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -413,10 +413,16 @@ &tlmm { };
&usb3 { + qcom,select-utmi-as-pipe-clk; + status = "okay"; };
&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + dr_mode = "peripheral"; extcon = <&extcon_usb>; };