On Thu, Jul 02, 2020 at 01:37:13AM +0300, Serge Semin wrote:
- Add a new capability like UART_CAP_NO16DIV and take it into account in the serial8250_get_baud_rate() method.
I don't have a documentation for the Mediatek UART port, but it seems to me that that controller calculates the baud rate differently from the standard 8250 port. A standard 8250 port does that by the next formulae: baud = uartclk / (16 * divisor). While it seems to me that the Mediatek port uses the formulae like: baud = uartclk / divisor. (Please, correct me if I'm wrong)
8250_bcm2835aux.c seems to suffer from a similar issue and solves it like this in the ->probe hook:
/* the HW-clock divider for bcm2835aux is 8, * but 8250 expects a divider of 16, * so we have to multiply the actual clock by 2 * to get identical baudrates. */ up.port.uartclk = clk_get_rate(data->clk) * 2;
- Manually call serial8250_do_set_divisor() in the custom set_termios() callback.
Just add the uart_update_timeout() and serial8250_do_set_divisor() methods invocation into the mtk8250_set_termios() function, which the original commit 81bb549fdf14 ("serial: 8250_mtk: support big baud rate") author should have done in the first place.
That sound preferable as adding new quirks into core code feels like a case of midlayer fallacy:
https://blog.ffwll.ch/2016/12/midlayers-once-more-with-feeling.html
Thanks,
Lukas