On Wed, Jun 12 2024 at 15:01, Huacai Chen wrote:
In the liointc hardware, there are different ISRs for different cores.
I have no idea what ISR means in that context. Can you please spell it out with proper words so that people not familiar with the details can understand it?
We always use core#0's ISR before but has no problem, it is because the interrupts are routed to core#0 by default. If we change the routing, we should set correct ISRs for different cores.
We do nothing. The code does.
See https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#changelog
Cc: stable@vger.kernel.org Signed-off-by: Tianli Xiong xiongtianli@loongson.cn Signed-off-by: Huacai Chen chenhuacai@loongson.cn
This Signed-off-by chain is wrong. If Tianli is the author then this needs a From: Tianli in the changelog. If you developed it together then this lacks a Co-developed-by tag.
See Documentation/process/
Thanks,
tglx