On Wed, Nov 13, 2024 at 12:05:08AM -0800, Qiang Yu wrote:
As per memory map table, the region for PCIe6a is 64MByte. Hence, set the size of 32 bit non-prefetchable memory region beginning on address 0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be allocated from 0x70300000 to 0x74000000.
Fixes: 7af141850012 ("arm64: dts: qcom: x1e80100: Fix up BAR spaces") Cc: stable@vger.kernel.org Signed-off-by: Qiang Yu quic_qianyu@quicinc.com
Thanks for the fix.
Reviewed-by: Johan Hovold johan+linaro@kernel.org