On Fri, 2 Jan 2026, at 3:52 PM, Icenowy Zheng wrote:
Currently the LS7A GMAC device tree node lacks a proper phy-handle property pointing to the PHY node.
In addition, the phy-mode property specifies "rgmii" without any internal delay information, which means the board trace needs to add 2ns delay to the RGMII data lines; but that isn't known to happen on any Loongson board. The ACPI-based initialization codepath, which is used on LoongArch-based 3A5000 + 7A1000 hardwares, specifies "rgmii-id" phy mode, which should be the one we are using.
Add the lacking phy-handle property and set proper phy-mode.
Tested on a LS3A4000_7A1000_NUC_BOARD_V2.1 board with YT8521S PHY.
Signed-off-by: Icenowy Zheng zhengxingda@iscas.ac.cn
Good catch! This with fine with realtek phy chips but YT8521S seems to be picky.
Reviewed-by: Jiaxun Yang jiaxun.yang@flygoat.com
Also maybe:
Cc: stable@vger.kernel.org
Given those boards rely on built-in DT.
Thanks
arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index ee71045883e7e..6dee85909f5a6 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -199,7 +199,8 @@ gmac@3,0 { <13 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&pic>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";phy-handle = <&phy0>; mdio { #address-cells = <1>; #size-cells = <0>;@@ -222,7 +223,8 @@ gmac@3,1 { <15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&pic>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";phy-handle = <&phy1>; mdio { #address-cells = <1>; #size-cells = <0>;-- 2.52.0