On Mon, Mar 06, 2023 at 03:57:52PM +0200, Abel Vesa wrote:
On 23-03-06 14:01:20, Johan Hovold wrote:
On Sun, Feb 19, 2023 at 06:57:01PM +0200, Abel Vesa wrote:
The slice IDs for CVPFW, CPUSS1 and CPUWHT currently overflow the 32bit LLCC config registers. Fix that by using the slice ID values taken from the latest LLCC SC table.
This still doesn't really explain what the impact of this bug is (e.g. for people doing backports), but I guess this will do.
Sent a v4 here: https://lore.kernel.org/all/20230306135527.509796-1-abel.vesa@linaro.org/
Looks good, thanks!
Johan