From: Borislav Petkov bp@suse.de
commit b2381acd3fd9bacd2c63f53b2c610c89959b31cc upstream.
This is a fix for the fix (yeah, /facepalm).
The correct mask to use is not the negation of the MXCSR_MASK but the actual mask which contains the supported bits in the MXCSR register.
Reported and debugged by Ville Syrjälä ville.syrjala@linux.intel.com
Fixes: d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits") Signed-off-by: Borislav Petkov bp@suse.de Tested-by: Ville Syrjälä ville.syrjala@linux.intel.com Tested-by: Ser Olmy ser.olmy@protonmail.com Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/YWgYIYXLriayyezv@intel.com Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org --- arch/x86/kernel/fpu/signal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -385,7 +385,7 @@ static int __fpu_restore_sig(void __user return -EINVAL; } else { /* Mask invalid bits out for historical reasons (broken hardware). */ - fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask; + fpu->state.fxsave.mxcsr &= mxcsr_feature_mask; }
/* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */