Re: [PATCH] x86/mm: Fix paging-structure cache flush on kernel table freeing

On Wed, 2025-05-28 at 22:30 +0200, Jann Horn wrote:

Note that since I'm not touching invlpgb_kernel_range_flush() or invlpgb_flush_addr_nosync() in this patch, the flush on PMD table deletion with INVLPGB might be a bit slow due to using PTE_STRIDE instead of PMD_STRIDE. I don't think that matters.

Agreed that this is probably fine.

The performance sensitive kernel flushes mostly seem to be small, related to static key toggling, etc

Cc: stable@vger.kernel.org Fixes: 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces") Signed-off-by: Jann Horn jannh@google.com

Reviewed-by: Rik van Riel riel@surriel.com