3.16.54-rc1 review patch. If anyone has any objections, please let me know.
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From: Doug Berger opendmb@gmail.com
commit 28c2d1a7a0bfdf3617800d2beae1c67983c03d15 upstream.
It is necessary for the UniMAC to be clocked at least 5 cycles while the sw_reset is asserted to ensure a clean reset.
It was discovered that this condition was not being met when connected to an external RGMII PHY that disabled the Rx clock in the Power Save state.
This commit modifies the reset_umac function to place the (RG)MII interface into a local loopback mode where the Rx clock comes from the GENET sourced Tx clk during the sw_reset to ensure the presence and stability of the clock.
In addition, it turns out that the sw_reset of the UniMAC is not self clearing, but this was masked by a bug in the timeout code.
The sw_reset is now explicitly cleared by zeroing the UMAC_CMD register before returning from reset_umac which makes it no longer necessary to do so in init_umac and makes the clearing of CMD_TX_EN and CMD_RX_EN by umac_enable_set redundant. The timeout code (and its associated bug) are removed so reset_umac no longer needs to return a result, and that means init_umac that calls reset_umac does not need to as well.
Fixes: 1c1008c793fa ("net: bcmgenet: add main driver file") Signed-off-by: Doug Berger opendmb@gmail.com Signed-off-by: David S. Miller davem@davemloft.net [bwh: Backported to 3.16: - Update call to init_umac() in bcmgenet_wol_resume() - Drop changes in bcmgenet_resume() - Adjust context] Signed-off-by: Ben Hutchings ben@decadent.org.uk --- --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c @@ -1509,12 +1509,8 @@ static void bcmgenet_free_rx_buffers(str } }
-static int reset_umac(struct bcmgenet_priv *priv) +static void reset_umac(struct bcmgenet_priv *priv) { - struct device *kdev = &priv->pdev->dev; - unsigned int timeout = 0; - u32 reg; - /* 7358a0/7552a0: bad default in RBUF_FLUSH_CTRL.umac_sw_rst */ bcmgenet_rbuf_ctrl_set(priv, 0); udelay(10); @@ -1522,38 +1518,21 @@ static int reset_umac(struct bcmgenet_pr /* disable MAC while updating its registers */ bcmgenet_umac_writel(priv, 0, UMAC_CMD);
- /* issue soft reset, wait for it to complete */ - bcmgenet_umac_writel(priv, CMD_SW_RESET, UMAC_CMD); - while (timeout++ < 1000) { - reg = bcmgenet_umac_readl(priv, UMAC_CMD); - if (!(reg & CMD_SW_RESET)) - return 0; - - udelay(1); - } - - if (timeout == 1000) { - dev_err(kdev, - "timeout waiting for MAC to come out of resetn\n"); - return -ETIMEDOUT; - } - - return 0; + /* issue soft reset with (rg)mii loopback to ensure a stable rxclk */ + bcmgenet_umac_writel(priv, CMD_SW_RESET | CMD_LCL_LOOP_EN, UMAC_CMD); + udelay(2); + bcmgenet_umac_writel(priv, 0, UMAC_CMD); }
-static int init_umac(struct bcmgenet_priv *priv) +static void init_umac(struct bcmgenet_priv *priv) { struct device *kdev = &priv->pdev->dev; - int ret; u32 reg, cpu_mask_clear;
dev_dbg(&priv->pdev->dev, "bcmgenet: init_umac\n");
- ret = reset_umac(priv); - if (ret) - return ret; + reset_umac(priv);
- bcmgenet_umac_writel(priv, 0, UMAC_CMD); /* clear tx/rx counter */ bcmgenet_umac_writel(priv, MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT, UMAC_MIB_CTRL); @@ -1604,8 +1583,6 @@ static int init_umac(struct bcmgenet_pri
/* Enable rx/tx engine.*/ dev_dbg(kdev, "done init umac\n"); - - return 0; }
/* Initialize all house-keeping variables for a TX ring, along @@ -1994,14 +1971,10 @@ static void bcmgenet_set_hw_addr(struct
static int bcmgenet_wol_resume(struct bcmgenet_priv *priv) { - int ret; - /* From WOL-enabled suspend, switch to regular clock */ clk_disable(priv->clk_wol); /* init umac registers to synchronize s/w with h/w */ - ret = init_umac(priv); - if (ret) - return ret; + init_umac(priv);
phy_init_hw(priv->phydev); /* Speed settings must be restored */ @@ -2062,14 +2035,7 @@ static int bcmgenet_open(struct net_devi /* take MAC out of reset */ bcmgenet_umac_reset(priv);
- ret = init_umac(priv); - if (ret) - goto err_clk_disable; - - /* disable ethernet MAC while updating its registers */ - reg = bcmgenet_umac_readl(priv, UMAC_CMD); - reg &= ~(CMD_TX_EN | CMD_RX_EN); - bcmgenet_umac_writel(priv, reg, UMAC_CMD); + init_umac(priv);
bcmgenet_set_hw_addr(priv, dev->dev_addr);
@@ -2603,9 +2569,7 @@ static int bcmgenet_probe(struct platfor !strcasecmp(phy_mode_str, "internal")) bcmgenet_power_up(priv, GENET_POWER_PASSIVE);
- err = reset_umac(priv); - if (err) - goto err_clk_disable; + reset_umac(priv);
err = bcmgenet_mii_init(dev); if (err)