 
            On Wed, Oct 29, 2025 at 03:31:30PM +0200, Abel Vesa wrote:
On X Elite platform, the eDP PHY uses one more clock called ref.
The current X Elite devices supported upstream work fine without this clock, because the boot firmware leaves this clock enabled. But we should not rely on that. Also, even though this change breaks the ABI, it is needed in order to make the driver disables this clock along with the other ones, for a proper bring-down of the entire PHY.
So attach the this ref clock to the PHY.
Cc: stable@vger.kernel.org # v6.10 Fixes: 5d5607861350 ("dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles") Reviewed-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org Signed-off-by: Abel Vesa abel.vesa@linaro.org
Reviewed-by: Bjorn Andersson andersson@kernel.org
.../devicetree/bindings/phy/qcom,edp-phy.yaml | 28 +++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index eb97181cbb9579893b4ee26a39c3559ad87b2fba..bfc4d75f50ff9e31981fe602478f28320545e52b 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -37,12 +37,15 @@ properties: - description: PLL register block clocks:
- maxItems: 2
- minItems: 2
- maxItems: 3
clock-names:
- minItems: 2 items:
- const: aux
- const: cfg_ahb
- const: ref"#clock-cells": const: 1 @@ -64,6 +67,29 @@ required:
- "#clock-cells"
- "#phy-cells"
+allOf:
- if:
properties:
compatible:
enum:
- qcom,x1e80100-dp-phy
Don't we have the refclk on all the other targets as well? I think we should proceed as you propose here, and if this is the case, revisit the other targets.
Regards, Bjorn
- then:
properties:
clocks:
minItems: 3
maxItems: 3
clock-names:
minItems: 3
maxItems: 3- else:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
minItems: 2
maxItems: 2additionalProperties: false examples:
-- 2.48.1