From: Paul Hsieh Paul.Hsieh@amd.com
[ Upstream commit 8b8a602c985e99074fa1d5233cd224b7bcfb9df2 ]
[Why] It makes DSC enable when we commit the stream which need keep power off.And then it will skip to disable DSC if pipe reset at this situation as power has been off. It may cause the DSC unexpected enable on the pipe with the next new stream which doesn't support DSC.
[HOW] Check the DSC used on current pipe status when update stream. Skip to enable if it has been off. The operation enable DSC should happen when set power on.
Reviewed-by: Wenjing Liu wenjing.liu@amd.com Signed-off-by: Paul Hsieh Paul.Hsieh@amd.com Signed-off-by: Aurabindo Pillai aurabindo.pillai@amd.com Tested-by: Daniel Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org ---
## **YES** This commit should be backported to stable kernel trees based on my comprehensive analysis: ### **Analysis Summary:** **1. Bug Description and Impact:** The commit fixes a critical DSC (Display Stream Compression) state management bug where: - DSC gets incorrectly enabled when committing a stream that should keep power off - When a pipe reset occurs with power already off, DSC disable is skipped - This causes DSC to be unexpectedly enabled on subsequent streams that don't support DSC - This can lead to display corruption or system instability for users with affected AMD GPUs **2. Code Changes Analysis:** The fix adds robust state checking in `drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c:72-108` by: ```c struct dcn_dsc_state dsc_state = {0}; if (!dsc) { DC_LOG_DSC("DSC is NULL for tg instance %d:", pipe_ctx->stream_res.tg->inst); return; } if (dsc->funcs->dsc_read_state) { dsc->funcs->dsc_read_state(dsc, &dsc_state); if (!dsc_state.dsc_fw_en) { DC_LOG_DSC("DSC has been disabled for tg instance %d:", pipe_ctx->stream_res.tg->inst); return; } } ``` This adds a critical safety check that: - Reads the current DSC hardware state before attempting to enable it - Checks if DSC is already disabled (`!dsc_state.dsc_fw_en`) - Returns early if DSC is already off, preventing incorrect state transitions **3. Consistency with Similar Fixes:** Historical analysis shows this exact fix pattern was already applied to: - **dcn32** in commit `4bdc5b504af7` (with Cc: stable@vger.kernel.org) - **dcn35** in the same commit - This commit extends the fix to **dcn314** hardware Similar Commit #1 in the examples shows a nearly identical fix that received **"Backport Status: YES"** and was explicitly marked for stable (`Cc: stable@vger.kernel.org`). **4. Backport Criteria Assessment:** - ✅ **Fixes important user- affecting bug**: Display corruption/instability - ✅ **Small and contained change**: Only 14 lines, minimal scope - ✅ **No architectural changes**: Pure defensive programming addition - ✅ **Minimal regression risk**: Only adds safety checks, no behavior change for correct flows - ✅ **Subsystem confined**: Limited to AMD display driver dcn314 path - ✅ **Follows established pattern**: Identical fix already applied to related hardware generations - ✅ **Clear maintainer support**: Previous similar commits included stable tree marking **5. Hardware Impact:** This affects DCN 3.14 generation AMD GPUs, which are used in production systems where display stability is critical for users. The fix follows the exact same defensive programming pattern already proven safe and effective in dcn32/dcn35, making it a low-risk, high-value backport candidate that addresses a real user-impacting display bug.
.../drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c index be26c925fdfa1..e68f21fd5f0fb 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c @@ -84,6 +84,20 @@ static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) struct dsc_config dsc_cfg; struct dsc_optc_config dsc_optc_cfg = {0}; enum optc_dsc_mode optc_dsc_mode; + struct dcn_dsc_state dsc_state = {0}; + + if (!dsc) { + DC_LOG_DSC("DSC is NULL for tg instance %d:", pipe_ctx->stream_res.tg->inst); + return; + } + + if (dsc->funcs->dsc_read_state) { + dsc->funcs->dsc_read_state(dsc, &dsc_state); + if (!dsc_state.dsc_fw_en) { + DC_LOG_DSC("DSC has been disabled for tg instance %d:", pipe_ctx->stream_res.tg->inst); + return; + } + }
/* Enable DSC hw block */ dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt;