From: Paul Cercueil paul@crapouillou.net
[ Upstream commit e6cfa64375d34a6c8c1861868a381013b2d3b921 ]
Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour.
This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet.
Signed-off-by: Paul Cercueil paul@crapouillou.net Acked-by: Stephen Boyd sboyd@codeaurora.org Cc: Ralf Baechle ralf@linux-mips.org Cc: Maarten ter Huurne maarten@treewalker.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18477/ Signed-off-by: James Hogan jhogan@kernel.org Signed-off-by: Sasha Levin alexander.levin@microsoft.com --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 7cfb7b2a2ed6..e5b1bf4dadcc 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -327,6 +327,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) div += 1;
rate /= div; + } else if (clk_info->type & CGU_CLK_FIXDIV) { + rate /= clk_info->fixdiv.div; }
return rate;