On 05-12-18, 18:28, Andy Shevchenko wrote:
Intel integrated DMA 32-bit support multi-block transfers. Add missed setting to the platform data.
Fixes: f7c799e950f9 ("dmaengine: dw: we do support Merrifield SoC in PCI mode") Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com Cc: stable@vger.kernel.org
How is this a stable material? It would improve performance by using multi blocks but given the fact that this is used for slow peripherals, do you really see a user impact?
drivers/dma/dw/pci.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c index 7778ed705a1a..313ba10c6224 100644 --- a/drivers/dma/dw/pci.c +++ b/drivers/dma/dw/pci.c @@ -25,6 +25,7 @@ static struct dw_dma_platform_data mrfld_pdata = { .block_size = 131071, .nr_masters = 1, .data_width = {4},
- .multi_block = {1, 1, 1, 1, 1, 1, 1, 1},
}; static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid) -- 2.19.2