On 2/14/23 23:08, Rick Wertenbroek wrote:
Assert PCI Configuration Enable bit after probe. When this bit is left to 0 in the endpoint mode, the RK3399 PCIe endpoint core will generate configuration request retry status (CRS) messages back to the root complex. Assert this bit after probe to allow the RK3399 PCIe endpoint core to reply to configuration requests from the root complex. This is documented in section 17.5.8.1.2 of the RK3399 TRM.
Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller") Cc: stable@vger.kernel.org Signed-off-by: Rick Wertenbroek rick.wertenbroek@gmail.com
Reviewed-by: Damien Le Moal damien.lemoal@opensource.wdc.com Tested-by: Damien Le Moal damien.lemoal@opensource.wdc.com