From: Krzysztof Hałasa khalasa@piap.pl
[ Upstream commit c01fba0b4869cada5403fffff416cd1675dba078 ]
Apparently, ISI needs cache settings similar to LCDIF. Otherwise we get artefacts in the image. Tested on i.MX8MP.
Signed-off-by: Krzysztof Hałasa khalasa@piap.pl Link: https://lore.kernel.org/r/m3ldr69lsw.fsf@t19.piap.pl Signed-off-by: Ulf Hansson ulf.hansson@linaro.org Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
Based on my analysis of the commit and the surrounding code:
**Backport Status: YES**
This commit should be backported to stable kernel trees for the following reasons:
1. **Fixes a real user-visible bug**: The commit fixes image artifacts in the ISI (Image Sensor Interface) on i.MX8MP. This is a functional bug that affects users of camera/image capture functionality.
2. **Small and contained change**: The fix adds only 10 lines of code that set ISI panic write hurry levels in the `imx8mp_media_power_notifier` function. It's a minimal change confined to the i.MX8MP media block controller.
3. **Follows established pattern**: The fix mirrors the existing LCDIF panic read hurry level fix (commit 06a9a229b159) that was already applied for display FIFO underflow issues. The ISI needs similar cache settings to prevent artifacts.
4. **Hardware-specific fix**: The change only affects i.MX8MP hardware and is guarded by the platform-specific power notifier function, minimizing risk to other platforms.
5. **Clear problem and solution**: The commit message clearly states the problem (image artifacts) and the solution (setting ISI panic write hurry levels similar to LCDIF), making it a straightforward hardware configuration fix.
6. **No architectural changes**: This is purely a hardware register configuration change during power-on sequences, not introducing new features or changing kernel architecture.
The fix addresses a hardware-specific issue where the ISI (Image Sensor Interface) needs proper cache/priority settings to avoid image artifacts, similar to how the LCDIF (display interface) needs such settings to avoid display FIFO underflow. This is an important fix for anyone using camera functionality on i.MX8MP platforms.
drivers/pmdomain/imx/imx8m-blk-ctrl.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/drivers/pmdomain/imx/imx8m-blk-ctrl.c b/drivers/pmdomain/imx/imx8m-blk-ctrl.c index ca942d7929c2..8b7b175f5896 100644 --- a/drivers/pmdomain/imx/imx8m-blk-ctrl.c +++ b/drivers/pmdomain/imx/imx8m-blk-ctrl.c @@ -665,6 +665,11 @@ static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data = { #define LCDIF_1_RD_HURRY GENMASK(15, 13) #define LCDIF_0_RD_HURRY GENMASK(12, 10)
+#define ISI_CACHE_CTRL 0x50 +#define ISI_V_WR_HURRY GENMASK(28, 26) +#define ISI_U_WR_HURRY GENMASK(25, 23) +#define ISI_Y_WR_HURRY GENMASK(22, 20) + static int imx8mp_media_power_notifier(struct notifier_block *nb, unsigned long action, void *data) { @@ -694,6 +699,11 @@ static int imx8mp_media_power_notifier(struct notifier_block *nb, regmap_set_bits(bc->regmap, LCDIF_ARCACHE_CTRL, FIELD_PREP(LCDIF_1_RD_HURRY, 7) | FIELD_PREP(LCDIF_0_RD_HURRY, 7)); + /* Same here for ISI */ + regmap_set_bits(bc->regmap, ISI_CACHE_CTRL, + FIELD_PREP(ISI_V_WR_HURRY, 7) | + FIELD_PREP(ISI_U_WR_HURRY, 7) | + FIELD_PREP(ISI_Y_WR_HURRY, 7)); }
return NOTIFY_OK;