From: Jonathan Cameron Jonathan.Cameron@huawei.com
[ Upstream commit 4a4a79c06caeec47003bcbee1cf3094479f26e24 ]
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition.
Fixes: 56ca9db862bf ("iio: dac: Add support for the AD5592R/AD5593R ADCs/DACs") Signed-off-by: Jonathan Cameron Jonathan.Cameron@huawei.com Cc: Paul Cercueil paul@crapouillou.net Acked-by: Nuno Sá nuno.sa@analog.com Link: https://lore.kernel.org/r/20220508175712.647246-49-jic23@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/iio/dac/ad5592r-base.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/iio/dac/ad5592r-base.h b/drivers/iio/dac/ad5592r-base.h index 2a22ef691996..cc7be426cbc8 100644 --- a/drivers/iio/dac/ad5592r-base.h +++ b/drivers/iio/dac/ad5592r-base.h @@ -14,6 +14,8 @@ #include <linux/mutex.h> #include <linux/gpio/driver.h>
+#include <linux/iio/iio.h> + struct device; struct ad5592r_state;
@@ -65,7 +67,7 @@ struct ad5592r_state { u8 gpio_in; u8 gpio_val;
- __be16 spi_msg ____cacheline_aligned; + __be16 spi_msg __aligned(IIO_DMA_MINALIGN); __be16 spi_msg_nop; };