On 7/15/2024 8:29 PM, Bryan O'Donoghue wrote:
We have both shared_ops for the Titan Top GDSC and a hard-coded always on whack the register and forget about it in probe().
@static struct clk_branch camcc_gdsc_clk = {}
Only one representation of the Top GDSC is required. Use the CCF representation not the hard-coded register write.
Fixes: ff93872a9c61 ("clk: qcom: camcc-sc8280xp: Add sc8280xp CAMCC") Tested-by: Bryan O'Donoghue bryan.odonoghue@linaro.org # Lenovo X13s Signed-off-by: Bryan O'Donoghue bryan.odonoghue@linaro.org
drivers/clk/qcom/camcc-sc8280xp.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/clk/qcom/camcc-sc8280xp.c b/drivers/clk/qcom/camcc-sc8280xp.c index 479964f91608..f99cd968459c 100644 --- a/drivers/clk/qcom/camcc-sc8280xp.c +++ b/drivers/clk/qcom/camcc-sc8280xp.c @@ -3031,19 +3031,14 @@ static int camcc_sc8280xp_probe(struct platform_device *pdev) clk_lucid_pll_configure(&camcc_pll6, regmap, &camcc_pll6_config); clk_lucid_pll_configure(&camcc_pll7, regmap, &camcc_pll7_config);
- /* Keep some clocks always-on */
- qcom_branch_set_clk_en(regmap, 0xc1e4); /* CAMCC_GDSC_CLK */
As I mentioned on [1], this change might break the GDSC functionality. Hence this shouldn't be removed.
[1] https://lore.kernel.org/linux-clk/0b84b689-8ab8-bcdf-f058-da2ead73786c@quici...
- ret = qcom_cc_really_probe(&pdev->dev, &camcc_sc8280xp_desc, regmap); if (ret)
goto err_disable;
goto err_put_rpm;pm_runtime_put(&pdev->dev); return 0; -err_disable:
- regmap_update_bits(regmap, 0xc1e4, BIT(0), 0);
This change is required, hence can go as a separate patch.
err_put_rpm: pm_runtime_put_sync(&pdev->dev);
base-commit: 3fe121b622825ff8cc995a1e6b026181c48188db change-id: 20240715-linux-next-24-07-13-sc8280xp-camcc-fixes-274f11b396ac
Best regards,