6.6-stable review patch. If anyone has any objections, please let me know.
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From: Lucas Stach l.stach@pengutronix.de
[ Upstream commit f6772c5882d2229b4e0d9aadbcac3eb922e822c0 ]
This adds the PGC and HDMI blk-ctrl nodes providing power control for HDMI subsystem peripherals.
Signed-off-by: Adam Ford aford173@gmail.com Signed-off-by: Lucas Stach l.stach@pengutronix.de Tested-by: Marek Vasut marex@denx.de Tested-by: Luca Ceresoli luca.ceresoli@bootlin.com Tested-by: Tommaso Merciai tomm.merciai@gmail.com Signed-off-by: Shawn Guo shawnguo@kernel.org Stable-dep-of: 2f8405fb077b ("arm64: dts: imx8mp: Fix pgc vpu locations") Signed-off-by: Sasha Levin sashal@kernel.org --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++++++++++++++++++++++ 1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 0b824120d5488..2de16e3d21d24 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -849,6 +849,23 @@ pgc_mediamix: power-domain@10 { <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; };
+ pgc_hdmimix: power-domain@14 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>; + clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, + <&clk IMX8MP_SYS_PLL1_133M>; + assigned-clock-rates = <500000000>, <133000000>; + }; + + pgc_hdmi_phy: power-domain@15 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HDMI_PHY>; + }; + pgc_mipi_phy2: power-domain@16 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>; @@ -1840,6 +1857,27 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { #power-domain-cells = <1>; #clock-cells = <0>; }; + + hdmi_blk_ctrl: blk-ctrl@32fc0000 { + compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; + reg = <0x32fc0000 0x1000>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_24M>, + <&clk IMX8MP_CLK_HDMI_FDCC_TST>; + clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc"; + power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmi_phy>, + <&pgc_hdmimix>, <&pgc_hdmimix>; + power-domain-names = "bus", "irqsteer", "lcdif", + "pai", "pvi", "trng", + "hdmi-tx", "hdmi-tx-phy", + "hdcp", "hrv"; + #power-domain-cells = <1>; + }; };
pcie: pcie@33800000 {