On Thu, Jun 12, 2025 at 11:14 AM Bartosz Golaszewski brgl@bgdev.pl wrote:
From: Bartosz Golaszewski bartosz.golaszewski@linaro.org
On some platforms, the UFS-reset pin has no interrupt logic in TLMM but is nevertheless registered as a GPIO in the kernel. This enables the user-space to trigger a BUG() in the pinctrl-msm driver by running, for example: `gpiomon -c 0 113` on RB2.
The exact culprit is requesting pins whose intr_detection_width setting is not 1 or 2 for interrupts. This hits a BUG() in msm_gpio_irq_set_type(). Potentially crashing the kernel due to an invalid request from user-space is not optimal, so let's go through the pins and mark those that would fail the check as invalid for the irq chip as we should not even register them as available irqs.
This function can be extended if we determine that there are more corner-cases like this.
Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver") Cc: stable@vger.kernel.org Reviewed-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Bartosz Golaszewski bartosz.golaszewski@linaro.org
Patch applied for fixes!
Yours, Linus Walleij