3.16.51-rc1 review patch. If anyone has any objections, please let me know.
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From: Matt Redfearn matt.redfearn@imgtec.com
commit b332fec0489295ee7a0aab4a89bd7257cd126f7f upstream.
The addiusp instruction uses the pool16d opcode, with bit 0 of the immediate set. The test for the addiusp opcode erroneously did a logical and of the immediate with mm_addiusp_func, which has value 1, so this test always passes when the immediate is non-zero.
Fix the test by replacing the logical and with a bitwise and.
Fixes: 34c2f668d0f6 ("MIPS: microMIPS: Add unaligned access support.") Signed-off-by: Matt Redfearn matt.redfearn@imgtec.com Cc: Marcin Nowakowski marcin.nowakowski@imgtec.com Cc: Ingo Molnar mingo@kernel.org Cc: Paul Burton paul.burton@imgtec.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16954/ Signed-off-by: Ralf Baechle ralf@linux-mips.org Signed-off-by: Ben Hutchings ben@decadent.org.uk --- arch/mips/kernel/process.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -353,7 +353,7 @@ static inline int is_sp_move_ins(union m */ if (mm_insn_16bit(ip->halfword[1])) { return (ip->mm16_r3_format.opcode == mm_pool16d_op && - ip->mm16_r3_format.simmediate && mm_addiusp_func) || + ip->mm16_r3_format.simmediate & mm_addiusp_func) || (ip->mm16_r5_format.opcode == mm_pool16d_op && ip->mm16_r5_format.rt == 29); }