On Tue, Apr 1, 2025 at 3:50 PM Christian Marangi ansuelsmth@gmail.com wrote:
The current PHY2 LED define are wrong and actually set BITs outside the related mask. Fix it and set the correct value. While at it, also use FIELD_PREP_CONST macro to make it simple to understand what values are actually applied for the mask.
Also fix wrong PHY LED mapping. The SoC Switch supports up to 4 port but the register define mapping for 5 PHY port, starting from 0. The mapping was wrongly defined starting from PHY1. Reorder the function group to start from PHY0. PHY4 is actually never supported as we don't have a GPIO pin to assign.
Cc: stable@vger.kernel.org Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Reviewed-by: Benjamin Larsson benjamin.larsson@genexis.eu Signed-off-by: Christian Marangi ansuelsmth@gmail.com
Patch applied for fixes.
Sorry for the delay!
Yours, Linus Walleij