The patch below does not apply to the 5.15-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to stable@vger.kernel.org.
Possible dependencies:
b78870e7f415 ("mmc: sdhci-tegra: Use actual clock rate for SW tuning correction") d618978dd4d3 ("mmc: sdhci-tegra: Add runtime PM and OPP support")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From b78870e7f41534cc719c295d1f8809aca93aeeab Mon Sep 17 00:00:00 2001 From: Prathamesh Shete pshete@nvidia.com Date: Thu, 6 Oct 2022 18:36:22 +0530 Subject: [PATCH] mmc: sdhci-tegra: Use actual clock rate for SW tuning correction
Ensure tegra_host member "curr_clk_rate" holds the actual clock rate instead of requested clock rate for proper use during tuning correction algorithm. Actual clk rate may not be the same as the requested clk frequency depending on the parent clock source set. Tuning correction algorithm depends on certain parameters which are sensitive to current clk rate. If the host clk is selected instead of the actual clock rate, tuning correction algorithm may end up applying invalid correction, which could result in errors
Fixes: ea8fc5953e8b ("mmc: tegra: update hw tuning process") Signed-off-by: Aniruddha TVS Rao anrao@nvidia.com Signed-off-by: Prathamesh Shete pshete@nvidia.com Acked-by: Adrian Hunter adrian.hunter@intel.com Acked-by: Thierry Reding treding@nvidia.com Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20221006130622.22900-4-pshete@nvidia.com Signed-off-by: Ulf Hansson ulf.hansson@linaro.org
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 2d2d8260c681..413925bce0ca 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -773,7 +773,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) dev_err(dev, "failed to set clk rate to %luHz: %d\n", host_clk, err);
- tegra_host->curr_clk_rate = host_clk; + tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk); if (tegra_host->ddr_signaling) host->max_clk = host_clk; else