On Mon, Apr 07, 2025 at 02:10:24PM -0400, Sasha Levin wrote:
From: Konrad Dybcio konrad.dybcio@oss.qualcomm.com
[ Upstream commit 0d8db251dd15d2e284f5a6a53bc2b869f3eca711 ]
Add a new, common configuration for Gen4x4 V6 PHYs without an init sequence.
The bootloader configures the hardware once and the OS retains that configuration by using the NOCSR reset line (which doesn't drop register state on assert) in place of the "full reset" one.
Use this new configuration for X1P42100's Gen4x4 PHY.
Acked-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org Tested-by: Jens Glathe jens.glathe@oldschoolsolutions.biz Signed-off-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com Link: https://lore.kernel.org/r/20250203-topic-x1p4_dts-v2-3-72cd4cdc767b@oss.qual... Signed-off-by: Vinod Koul vkoul@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org
Support for this SoC is not even in mainline yet so there is really no need to backport this one.
Please drop from all stable queues.
Johan