On Sat, Oct 15, 2022 at 12:18:57PM +0100, Conor Dooley wrote:
From: Aurelien Jarno aurelien@aurel32.net
commit 6df2a016c0c8a3d0933ef33dd192ea6606b115e3 upstream.
From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i instruction has separated from the `I` extension, become two standalone extensions: Zicsr and Zifencei. As the kernel uses those instruction, this causes the following build failure:
CC arch/riscv/kernel/vdso/vgettimeofday.o <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages: <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
The fix is to specify those extensions explicitly in -march. However as older binutils version do not support this, we first need to detect that.
Signed-off-by: Aurelien Jarno aurelien@aurel32.net Tested-by: Alexandre Ghiti alexandre.ghiti@canonical.com Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt palmer@rivosinc.com [Conor: converted to the 4.19 style of march string generation] Signed-off-by: Conor Dooley conor.dooley@microchip.com
CC: Palmer Dabbelt palmer@dabbelt.com CC: linux-riscv@lists.infradead.org CC: Greg Kroah-Hartman gregkh@linuxfoundation.org
lkp has yet to complain, so here you go Greg..
Now queued up, thanks.
greg k-h