6.15-stable review patch. If anyone has any objections, please let me know.
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From: Jyothi Kumar Seerapu quic_jseerapu@quicinc.com
[ Upstream commit 515551e65635b988f2afa9e8683a6b57d6cfba36 ]
Correct the clocks property for the uart14 node to fix UART functionality on QUP2_SE6. The current failure is due to an incorrect clocks assignment.
Change the clocks property to GCC_QUPV3_WRAP2_S6_CLK to resolve the issue.
Signed-off-by: Jyothi Kumar Seerapu quic_jseerapu@quicinc.com Reviewed-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com Fixes: 068c3d3c83be ("arm64: dts: qcom: Add base SM8750 dtsi") Link: https://lore.kernel.org/r/20250312104358.2558-1-quic_jseerapu@quicinc.com Signed-off-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index d08a2dbeb0f79..e8bb587a7813f 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -993,7 +993,7 @@
interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP2_S6_CLK>; clock-names = "se";
interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS