Hi Marek, On Wed, 2023-02-22 at 04:17 +0100, Marek Vasut wrote:
Per KSZ8794 [1] datasheet DS00002134D page 54 TABLE 4-4: PORT REGISTERS, it is Register 86 (0x56): Port 4 Interface Control 6 which contains the Is_1Gbps field.
Currently, the driver uses PORT read function on register P_XMII_CTRL_1 to access the P_GMII_1GBIT_M, i.e. Is_1Gbps, bit. The problem is, the register P_XMII_CTRL_1 address is already 0x56, which is the converted PORT register address instead of the offset within PORT register space that PORT read function expects and converts into the PORT register address internally. The incorrectly double-converted register address becomes 0xa6, which is what the PORT read function ultimatelly accesses, and which is a non-existent register on the KSZ8794/KSZ8795 .
The correct value for P_XMII_CTRL_1 is 0x6, which gets converted into port address 0x56, which is Register 86 (0x56): Port 4 Interface Control 6 per KSZ8794 datasheet, i.e. the correct register address.
To make this worse, there are multiple other call sites which read and even write the P_XMII_CTRL_1 register, one of them is ksz_set_xmii(), which is responsible for configuration of RGMII delays. These delays are incorrectly configured and a non-existent register is written without this change.
Fix the P_XMII_CTRL_1 register offset to resolve these problems.
[1] https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocume...
Fixes: 46f80fa8981b ("net: dsa: microchip: add common gigabit set and get function") Signed-off-by: Marek Vasut marex@denx.de
Thanks for the catch. I overlooked the ksz_write to ksz_pwrite when refactoring the code for common KSZ implementation.
Acked-by: Arun Ramadoss arun.ramadoss@microchip.com