arm64: XGene-1 has a 31 bit, not a 32 bit, arch timer.
Fixes: 012f188504528b8cb32f441ac3bd9ea2eba39c9e ("clocksource/drivers/arm_arch_timer: Work around broken CVAL implementations")
Testing: On an 8-cpu Mustang, the following sequence no longer locks up the system:
echo 0 >/proc/sys/kernel/watchdog for i in {0..7}; do taskset -c $i echo hi there $i; done
Stable: To be applied to 5.16 and above, once accepted by mainline.
Signed-off-by: Joe Korty joe.korty@concurrent-rt.com
Index: b/drivers/clocksource/arm_arch_timer.c =================================================================== --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -805,7 +805,7 @@ static u64 __arch_timer_check_delta(void const struct midr_range broken_cval_midrs[] = { /* * XGene-1 implements CVAL in terms of TVAL, meaning - * that the maximum timer range is 32bit. Shame on them. + * that the maximum timer range is 31bit. Shame on them. */ MIDR_ALL_VERSIONS(MIDR_CPU_MODEL(ARM_CPU_IMP_APM, APM_CPU_PART_POTENZA)), @@ -813,8 +813,8 @@ static u64 __arch_timer_check_delta(void };
if (is_midr_in_range_list(read_cpuid_id(), broken_cval_midrs)) { - pr_warn_once("Broken CNTx_CVAL_EL1, limiting width to 32bits"); - return CLOCKSOURCE_MASK(32); + pr_warn_once("Broken CNTx_CVAL_EL1, limiting width to 31bits"); + return CLOCKSOURCE_MASK(31); } #endif return CLOCKSOURCE_MASK(arch_counter_get_width());