On Tue, 08 Oct 2024 17:43:33 +0200 Angelo Dureghello adureghello@baylibre.com wrote:
From: Angelo Dureghello adureghello@baylibre.com
Fix ADI_DAC_R1_MODE of AXI_DAC_REG_CNTRL_2.
Both generic DAC and ad3552r DAC IPs docs are reporting bit 5 for it.
Link: https://wiki.analog.com/resources/fpga/docs/axi_dac_ip Fixes: 4e3949a192e4 ("iio: dac: add support for AXI DAC IP core") Cc: stable@vger.kernel.org Signed-off-by: Angelo Dureghello adureghello@baylibre.com Reviewed-by: Nuno Sa nuno.sa@analog.com
Because we have a series built on top of this, I've picked it up in the togreg branch of iio.git - not as the fixes-togreg branch. That means it will go upstream and get pulled into stable etc next merge window.
If anyone needs it quicker shout and I can rethink that.
drivers/iio/dac/adi-axi-dac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/dac/adi-axi-dac.c b/drivers/iio/dac/adi-axi-dac.c index 0cb00f3bec04..b8b4171b8043 100644 --- a/drivers/iio/dac/adi-axi-dac.c +++ b/drivers/iio/dac/adi-axi-dac.c @@ -46,7 +46,7 @@ #define AXI_DAC_REG_CNTRL_1 0x0044 #define AXI_DAC_SYNC BIT(0) #define AXI_DAC_REG_CNTRL_2 0x0048 -#define ADI_DAC_R1_MODE BIT(4) +#define ADI_DAC_R1_MODE BIT(5) #define AXI_DAC_DRP_STATUS 0x0074 #define AXI_DAC_DRP_LOCKED BIT(17) /* DAC Channel controls */