4.18-stable review patch. If anyone has any objections, please let me know.
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From: Keith Busch keith.busch@intel.com
commit a7f58b9ecfd3c0f63703ec10f4a592cc38dbd1b8 upstream.
Devices with slow interrupt handlers are significantly harming performance when their interrupt vector is shared with a fast device.
Create a class code white list for devices with known fast interrupt handlers and let all other devices share a single vector so that they don't interfere with performance.
At the moment, only the NVM Express class code is on the list, but more may be added if VMD users desire to use other low-latency devices in these domains.
Signed-off-by: Keith Busch keith.busch@intel.com [lorenzo.pieralisi@arm.com: changelog] Signed-off-by: Lorenzo Pieralisi lorenzo.pieralisi@arm.com Acked-by: Jon Derrick: jonathan.derrick@intel.com Cc: "Heitke, Kenneth" kenneth.heitke@intel.com Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
--- drivers/pci/controller/vmd.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)
--- a/drivers/pci/controller/vmd.c +++ b/drivers/pci/controller/vmd.c @@ -197,9 +197,20 @@ static struct vmd_irq_list *vmd_next_irq int i, best = 1; unsigned long flags;
- if (pci_is_bridge(msi_desc_to_pci_dev(desc)) || vmd->msix_count == 1) + if (vmd->msix_count == 1) return &vmd->irqs[0];
+ /* + * White list for fast-interrupt handlers. All others will share the + * "slow" interrupt vector. + */ + switch (msi_desc_to_pci_dev(desc)->class) { + case PCI_CLASS_STORAGE_EXPRESS: + break; + default: + return &vmd->irqs[0]; + } + raw_spin_lock_irqsave(&list_lock, flags); for (i = 1; i < vmd->msix_count; i++) if (vmd->irqs[i].count < vmd->irqs[best].count)