On Fri, May 31 2024 at 10:16, Christian Heusel wrote:
On 24/05/31 10:13AM, Christian Heusel wrote: [ 0.046127] TSC deadline timer available [ 0.046129] CPU topo: Max. logical packages: 1 [ 0.046129] CPU topo: Max. logical dies: 1 [ 0.046129] CPU topo: Max. dies per package: 1 [ 0.046131] CPU topo: Max. threads per core: 2 [ 0.046132] CPU topo: Num. cores per package: 10 [ 0.046132] CPU topo: Num. threads per package: 12 [ 0.046132] CPU topo: Allowing 12 present CPUs plus 0 hotplug CPUs
This looks correct.
[ 0.117308] smpboot: x86: Booting SMP configuration: [ 0.117308] .... node #0, CPUs: #2 #4 #5 #6 #7 #8 #9 #10 #11 [ 0.009676] [Firmware Bug]: CPU4: Topology domain 1 shift 7 != 6
So this means that the E-Cores have a different topology information for the CORE shift value than the P-Cores which is definitely wrong.
Let's see what cpuid -r reports.
Thanks,
tglx