From: Chen Wang unicorn_wang@outlook.com
[ Upstream commit 49a6c160ad4812476f8ae1a8f4ed6d15adfa6c09 ]
cdns_pcie::ops might not be populated by all the Cadence glue drivers. This is going to be true for the upcoming Sophgo platform which doesn't set the ops.
Hence, add a check to prevent NULL pointer dereference.
Signed-off-by: Chen Wang unicorn_wang@outlook.com [mani: reworded subject and description] Signed-off-by: Manivannan Sadhasivam mani@kernel.org Link: https://patch.msgid.link/35182ee1d972dfcd093a964e11205efcebbdc044.1757643388... Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
YES **Why Backport** - The shared Cadence core dereferences `pcie->ops` unconditionally in several hot paths (`drivers/pci/controller/cadence/pcie-cadence- host.c:534`, `pcie-cadence.c:109` and `:140`, `pcie-cadence.h:497`, `505`, `511`). If a glue driver legitimately leaves `ops` unset, the host setup oopses during probe. - The new in-tree Sophgo driver (`drivers/pci/controller/cadence/pcie- sg2042.c:35-69`) deliberately does not populate `pcie->ops`; without this fix `cdns_pcie_host_setup()` trips the NULL dereference in `cdns_pcie_host_init_address_translation()` immediately, so the controller cannot even enumerate. - The patch simply wraps each dereference with `pcie->ops && pcie->ops->...`, meaning existing platforms that register callbacks keep identical behaviour, while platforms that do not provide optional hooks now fall back to the previously implied defaults — avoiding the fatal crash.
**Risk** - Change is entirely in guard logic, no register programming altered when `ops` is present. For platforms that rely on `cpu_addr_fixup`/link callbacks, the functions still run because the pointer remains non-NULL. - For platforms without callbacks, the driver already relied on the default behaviour implied by the inline helpers; the patch just matches that expectation. Regression risk is therefore minimal.
**Next Steps** - 1) Smoke/boot-test on at least one Cadence RC platform (e.g. TI J721E) plus the Sophgo SG2042 host once both patches are staged, to confirm link bring-up stays healthy.
drivers/pci/controller/cadence/pcie-cadence-host.c | 2 +- drivers/pci/controller/cadence/pcie-cadence.c | 4 ++-- drivers/pci/controller/cadence/pcie-cadence.h | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c index 59a4631de79fe..fffd63d6665e8 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-host.c +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c @@ -531,7 +531,7 @@ static int cdns_pcie_host_init_address_translation(struct cdns_pcie_rc *rc) cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(0), addr1); cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(0), desc1);
- if (pcie->ops->cpu_addr_fixup) + if (pcie->ops && pcie->ops->cpu_addr_fixup) cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr);
addr0 = CDNS_PCIE_AT_OB_REGION_CPU_ADDR0_NBITS(12) | diff --git a/drivers/pci/controller/cadence/pcie-cadence.c b/drivers/pci/controller/cadence/pcie-cadence.c index 70a19573440ee..61806bbd8aa32 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.c +++ b/drivers/pci/controller/cadence/pcie-cadence.c @@ -92,7 +92,7 @@ void cdns_pcie_set_outbound_region(struct cdns_pcie *pcie, u8 busnr, u8 fn, cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(r), desc1);
/* Set the CPU address */ - if (pcie->ops->cpu_addr_fixup) + if (pcie->ops && pcie->ops->cpu_addr_fixup) cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr);
addr0 = CDNS_PCIE_AT_OB_REGION_CPU_ADDR0_NBITS(nbits) | @@ -123,7 +123,7 @@ void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie, }
/* Set the CPU address */ - if (pcie->ops->cpu_addr_fixup) + if (pcie->ops && pcie->ops->cpu_addr_fixup) cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr);
addr0 = CDNS_PCIE_AT_OB_REGION_CPU_ADDR0_NBITS(17) | diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index 1d81c4bf6c6db..2f07ba661bda7 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -468,7 +468,7 @@ static inline u32 cdns_pcie_ep_fn_readl(struct cdns_pcie *pcie, u8 fn, u32 reg)
static inline int cdns_pcie_start_link(struct cdns_pcie *pcie) { - if (pcie->ops->start_link) + if (pcie->ops && pcie->ops->start_link) return pcie->ops->start_link(pcie);
return 0; @@ -476,13 +476,13 @@ static inline int cdns_pcie_start_link(struct cdns_pcie *pcie)
static inline void cdns_pcie_stop_link(struct cdns_pcie *pcie) { - if (pcie->ops->stop_link) + if (pcie->ops && pcie->ops->stop_link) pcie->ops->stop_link(pcie); }
static inline bool cdns_pcie_link_up(struct cdns_pcie *pcie) { - if (pcie->ops->link_up) + if (pcie->ops && pcie->ops->link_up) return pcie->ops->link_up(pcie);
return true;