On 12.01.2024 16:59, Johan Hovold wrote:
On Fri, Jan 12, 2024 at 07:52:02PM +0530, Krishna chaitanya chundru wrote:
CPU-PCIe path consits for registers PCIe BAR space, config space.
consits?
As there is less access on this path compared to pcie to mem path add minimum vote i.e GEN1x1 bandwidth always.
gen1 bandwidth can't be right.
In suspend remove the cpu vote after register space access is done.
Fixes: c4860af88d0c ("PCI: qcom: Add basic interconnect support") cc: stable@vger.kernel.org
This does not look like a fix so drop the above.
The commit you refer to explicitly left this path unconfigured for now and only added support for the configuring the mem path as needed on sc8280xp which otherwise would crash.
I only sorta agree. I'd include a fixes tag but point it to either 8450 addition or original driver introduction, as this is patching up a real hole (see my reply to Bryan).
@@ -1573,7 +1588,7 @@ static int qcom_pcie_suspend_noirq(struct device *dev) */ ret = icc_set_bw(pcie->icc_mem, 0, kBps_to_icc(1)); if (ret) {
dev_err(dev, "Failed to set interconnect bandwidth: %d\n", ret);
dev_err(dev, "Failed to set interconnect bandwidth for pcie-mem: %d\n", ret);@@ -1597,6 +1612,12 @@ static int qcom_pcie_suspend_noirq(struct device *dev) pcie->suspended = true; }
- /* Remove cpu path vote after all the register access is done */
- ret = icc_set_bw(pcie->icc_cpu, 0, 0);
I believe you should use icc_disable() here.
Oh, TIL this exists!
Konrad