11 Oct
2018
11 Oct
'18
9:46 a.m.
On Tue, Oct 09, 2018 at 12:58:27PM +0530, Harsh Jain wrote:
commit add92a817e60e308a419693413a38d9d1e663aff upstream
Update PCI Id in "cpl_rx_phys_dsgl" header. In case pci_chan_id and tx_chan_id are not derived from same queue, H/W can send request completion indication before completing DMA Transfer.
Cc: stable@vger.kernel.org # 4.14.x Signed-off-by: Harsh Jain harsh@chelsio.com
drivers/crypto/chelsio/chcr_algo.c | 41 ++++++++++++++++++++++++------------ drivers/crypto/chelsio/chcr_crypto.h | 2 ++ 2 files changed, 29 insertions(+), 14 deletions(-)
Now applied, thanks.
greg k-h