On 3/26/24 3:10 PM, Conor Dooley wrote:
On Tue, Mar 26, 2024 at 03:06:33PM -0700, Bo Gan wrote:
On 3/26/24 1:37 PM, Conor Dooley wrote:
From: Conor Dooley conor.dooley@microchip.com
On Thu, 07 Mar 2024 20:21:12 +0800, Shengyu Qu wrote:
Interrupt line number of the AXP15060 PMIC is not a necessary part of its device tree. And this would cause kernel to try to enable interrupt line 0, which is not expected. So delete this part from device tree.
Applied to riscv-dt-fixes, thanks! And I didn't forget, so I re-wrote the commit message to add some more information as promised.
[1/1] riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board https://git.kernel.org/conor/c/0b163f43920d
Thanks, Conor.
Hi Conor,
Thank you very much for taking care of this. Actually the PLIC may silently ignore the enablement of interrupt 0, so the upstream openSBI won't notice anything. My modified version, however, will deliberately trigger a fault for all writes to the reserved fields of PLIC, thus catching this issue.
Hope it can clarify things a bit more.
https://git.kernel.org/conor/c/0f74c64f0a9f
Better?
Great! Thanks again.
Bo