From: Fabio Estevam festevam@gmail.com
commit 798a1807ab13a38e21c6fecd8d22a513d6786e2d upstream.
According to the datasheet RTL8211, it must be asserted low for at least 10ms and at least 72ms "for internal circuits settling time" before accessing the PHY registers.
Add properties to describe such requirements.
Reported-by: Joakim Zhang qiangqing.zhang@nxp.com Signed-off-by: Fabio Estevam festevam@gmail.com Tested-by: Joakim Zhang qiangqing.zhang@nxp.com Signed-off-by: Shawn Guo shawnguo@kernel.org Cc: Rasmus Villemoes rasmus.villemoes@prevas.dk Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 ++ 1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -62,6 +62,8 @@ reg = <1>; eee-broken-1000t; reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <80000>; }; }; };