6.1-stable review patch. If anyone has any objections, please let me know.
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From: William Qiu william.qiu@starfivetech.com
[ Upstream commit 47fef94afeae2a125607b6b45145594713471320 ]
Add QSPI reset operation in device probe and add RISCV support to QUAD SPI Kconfig.
Co-developed-by: Ziv Xu ziv.xu@starfivetech.com Signed-off-by: Ziv Xu ziv.xu@starfivetech.com Signed-off-by: William Qiu william.qiu@starfivetech.com Link: https://lore.kernel.org/r/20230302105221.197421-3-william.qiu@starfivetech.c... Signed-off-by: Mark Brown broonie@kernel.org Stable-dep-of: 1889dd208197 ("spi: cadence-quadspi: Fix clock disable on probe failure path") Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/spi/Kconfig | 2 +- drivers/spi/spi-cadence-quadspi.c | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 15ea11ebcbe0..834fc0b8e27e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -230,7 +230,7 @@ config SPI_CADENCE
config SPI_CADENCE_QUADSPI tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST) + depends on OF && (ARM || ARM64 || X86 || RISCV || COMPILE_TEST) help Enable support for the Cadence Quad SPI Flash controller.
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 3200e55136cd..fe537b8d87e5 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1586,7 +1586,7 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) static int cqspi_probe(struct platform_device *pdev) { const struct cqspi_driver_platdata *ddata; - struct reset_control *rstc, *rstc_ocp; + struct reset_control *rstc, *rstc_ocp, *rstc_ref; struct device *dev = &pdev->dev; struct spi_master *master; struct resource *res_ahb; @@ -1679,6 +1679,17 @@ static int cqspi_probe(struct platform_device *pdev) goto probe_reset_failed; }
+ if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) { + rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref"); + if (IS_ERR(rstc_ref)) { + ret = PTR_ERR(rstc_ref); + dev_err(dev, "Cannot get QSPI REF reset.\n"); + goto probe_reset_failed; + } + reset_control_assert(rstc_ref); + reset_control_deassert(rstc_ref); + } + reset_control_assert(rstc); reset_control_deassert(rstc);
@@ -1836,6 +1847,10 @@ static const struct cqspi_driver_platdata versal_ospi = { .get_dma_status = cqspi_get_versal_dma_status, };
+static const struct cqspi_driver_platdata jh7110_qspi = { + .quirks = CQSPI_DISABLE_DAC_MODE, +}; + static const struct of_device_id cqspi_dt_ids[] = { { .compatible = "cdns,qspi-nor", @@ -1861,6 +1876,10 @@ static const struct of_device_id cqspi_dt_ids[] = { .compatible = "intel,socfpga-qspi", .data = &socfpga_qspi, }, + { + .compatible = "starfive,jh7110-qspi", + .data = &jh7110_qspi, + }, { /* end of table */ } };