Hi Sascha,
On Thu, 9 Sep 2021 07:38:22 -0400, Sasha Levin wrote:
From: Heiner Kallweit hkallweit1@gmail.com
[ Upstream commit a6b8bb6a813a6621c75ceacd1fa604c0229e9624 ]
Bit SMBHSTCNT_PEC_EN is used only if software calculates the CRC and uses register SMBPEC. This is not supported by the driver, it supports hw-calculation of CRC only (using bit SMBAUXSTS_CRCE). The chip spec states the following, therefore never set bit SMBHSTCNT_PEC_EN.
Chapter SMBus CRC Generation and Checking If the AAC bit is set in the Auxiliary Control register, the PCH automatically calculates and drives CRC at the end of the transmitted packet for write cycles, and will check the CRC for read cycles. It will not transmit the contents of the PEC register for CRC. The PEC bit must not be set in the Host Control register. If this bit is set, unspecified behavior will result.
This patch is based solely on the specification and compile-tested only, because I have no PEC-capable devices.
Signed-off-by: Heiner Kallweit hkallweit1@gmail.com Tested-by: Jean Delvare jdelvare@suse.de Signed-off-by: Wolfram Sang wsa@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org
drivers/i2c/busses/i2c-i801.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-)
This patch fixes a theoretical problem nobody has ever complained about. I don't think it makes sense to backport it to stable kernel branches.