On Wed, Apr 1, 2020 at 4:37 PM Jann Horn jannh@google.com wrote:
GCC will generate code for this without complaining, but I think it'll probably generate a tearing store on 32-bit platforms:
This is very much a "we don't care" case.
It's literally testing a sequence counter for equality. If you get tearing in the high bits on the write (or the read), you'd still need to have the low bits turn around 4G times to get a matching value.
So no. We're not doing atomics for the 32-bit case. That's insane.
Linus