6.7-stable review patch. If anyone has any objections, please let me know.
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From: Sakari Ailus sakari.ailus@linux.intel.com
[ Upstream commit cd93cc245dfe334c38da98c14b34f9597e1b4ea6 ]
Add CCI_REG_WIDTH() macro to obtain register width in bits and similarly, CCI_REG_WIDTH_BYTES() to obtain it in bytes.
Also add CCI_REG_ADDR() macro to obtain the address of a register.
Use both macros in v4l2-cci.c, too.
Signed-off-by: Sakari Ailus sakari.ailus@linux.intel.com Reviewed-by: Hans de Goede hdegoede@redhat.com Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com Signed-off-by: Hans Verkuil hverkuil-cisco@xs4all.nl Stable-dep-of: d92e7a013ff3 ("media: v4l2-cci: Add support for little-endian encoded registers") Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/media/v4l2-core/v4l2-cci.c | 8 ++++---- include/media/v4l2-cci.h | 5 +++++ 2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/media/v4l2-core/v4l2-cci.c b/drivers/media/v4l2-core/v4l2-cci.c index bc2dbec019b0..3179160abde3 100644 --- a/drivers/media/v4l2-core/v4l2-cci.c +++ b/drivers/media/v4l2-core/v4l2-cci.c @@ -25,8 +25,8 @@ int cci_read(struct regmap *map, u32 reg, u64 *val, int *err) if (err && *err) return *err;
- len = FIELD_GET(CCI_REG_WIDTH_MASK, reg); - reg = FIELD_GET(CCI_REG_ADDR_MASK, reg); + len = CCI_REG_WIDTH_BYTES(reg); + reg = CCI_REG_ADDR(reg);
ret = regmap_bulk_read(map, reg, buf, len); if (ret) { @@ -75,8 +75,8 @@ int cci_write(struct regmap *map, u32 reg, u64 val, int *err) if (err && *err) return *err;
- len = FIELD_GET(CCI_REG_WIDTH_MASK, reg); - reg = FIELD_GET(CCI_REG_ADDR_MASK, reg); + len = CCI_REG_WIDTH_BYTES(reg); + reg = CCI_REG_ADDR(reg);
switch (len) { case 1: diff --git a/include/media/v4l2-cci.h b/include/media/v4l2-cci.h index f2c2962e936b..a2835a663df5 100644 --- a/include/media/v4l2-cci.h +++ b/include/media/v4l2-cci.h @@ -7,6 +7,7 @@ #ifndef _V4L2_CCI_H #define _V4L2_CCI_H
+#include <linux/bitfield.h> #include <linux/bits.h> #include <linux/types.h>
@@ -34,6 +35,10 @@ struct cci_reg_sequence { #define CCI_REG_WIDTH_SHIFT 16 #define CCI_REG_WIDTH_MASK GENMASK(19, 16)
+#define CCI_REG_WIDTH_BYTES(x) FIELD_GET(CCI_REG_WIDTH_MASK, x) +#define CCI_REG_WIDTH(x) (CCI_REG_WIDTH_BYTES(x) << 3) +#define CCI_REG_ADDR(x) FIELD_GET(CCI_REG_ADDR_MASK, x) + #define CCI_REG8(x) ((1 << CCI_REG_WIDTH_SHIFT) | (x)) #define CCI_REG16(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x)) #define CCI_REG24(x) ((3 << CCI_REG_WIDTH_SHIFT) | (x))