The patch below does not apply to the 5.15-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to stable@vger.kernel.org.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.15.y git checkout FETCH_HEAD git cherry-pick -x a42e74391783603b28f266fc7bbfc1011eb0a151 # <resolve conflicts, build, test, etc.> git commit -s git send-email --to 'stable@vger.kernel.org' --in-reply-to '2024081238-deferral-neuron-7787@gregkh' --subject-prefix 'PATCH 5.15.y' HEAD^..
Possible dependencies:
a42e74391783 ("drm/amd/display: Call dpmm when checking mode support") 70839da63605 ("drm/amd/display: Add new DCN401 sources")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From a42e74391783603b28f266fc7bbfc1011eb0a151 Mon Sep 17 00:00:00 2001 From: George Shen george.shen@amd.com Date: Tue, 4 Jun 2024 10:11:23 -0400 Subject: [PATCH] drm/amd/display: Call dpmm when checking mode support
[WHY] In check_mode_supported, we should validate that the required clocks can be successfully mapped to DPM levels.
This ensures we only apply dynamic ODM optimizations to modes that are supported without dynamic ODM optimizations to begin with.
[HOW] Call dpmm to check that the display config can successfully be mapped to a DPM level.
Reviewed-by: Chaitanya Dhere chaitanya.dhere@amd.com Cc: Mario Limonciello mario.limonciello@amd.com Cc: Alex Deucher alexander.deucher@amd.com Cc: stable@vger.kernel.org Signed-off-by: Alex Hung alex.hung@amd.com Signed-off-by: George Shen george.shen@amd.com Tested-by: Daniel Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c index b442e1f9f204..9c28304568d2 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c @@ -257,6 +257,7 @@ static bool dml21_check_mode_support(const struct dc *in_dc, struct dc_state *co
mode_support->dml2_instance = dml_init->dml2_instance; dml21_map_dc_state_into_dml_display_cfg(in_dc, context, dml_ctx); + dml_ctx->v21.mode_programming.dml2_instance->scratch.build_mode_programming_locals.mode_programming_params.programming = dml_ctx->v21.mode_programming.programming; is_supported = dml2_check_mode_supported(mode_support); if (!is_supported) return false; diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top.c index 6f334fdc6eb8..2fb3e2f45e07 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top.c @@ -96,10 +96,15 @@ bool dml2_check_mode_supported(struct dml2_check_mode_supported_in_out *in_out) { struct dml2_instance *dml = (struct dml2_instance *)in_out->dml2_instance; struct dml2_check_mode_supported_locals *l = &dml->scratch.check_mode_supported_locals; + /* Borrow the build_mode_programming_locals programming struct for DPMM call. */ + struct dml2_display_cfg_programming *dpmm_programming = dml->scratch.build_mode_programming_locals.mode_programming_params.programming;
bool result = false; bool mcache_success = false;
+ if (dpmm_programming) + memset(dpmm_programming, 0, sizeof(struct dml2_display_cfg_programming)); + setup_unoptimized_display_config_with_meta(dml, &l->base_display_config_with_meta, in_out->display_config);
l->mode_support_params.instance = &dml->core_instance; @@ -122,6 +127,18 @@ bool dml2_check_mode_supported(struct dml2_check_mode_supported_in_out *in_out) mcache_success = dml2_top_optimization_perform_optimization_phase(&l->optimization_phase_locals, &mcache_phase); }
+ /* + * Call DPMM to map all requirements to minimum clock state + */ + if (result && dpmm_programming) { + l->dppm_map_mode_params.min_clk_table = &dml->min_clk_table; + l->dppm_map_mode_params.display_cfg = &l->base_display_config_with_meta; + l->dppm_map_mode_params.programming = dpmm_programming; + l->dppm_map_mode_params.soc_bb = &dml->soc_bbox; + l->dppm_map_mode_params.ip = &dml->core_instance.clean_me_up.mode_lib.ip; + result = dml->dpmm_instance.map_mode_to_soc_dpm(&l->dppm_map_mode_params); + } + in_out->is_supported = mcache_success; result = result && in_out->is_supported;
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h index dd90c5df5a5a..5632cdacb7f4 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h @@ -870,6 +870,7 @@ struct dml2_check_mode_supported_locals { struct dml2_optimization_phase_locals optimization_phase_locals; struct display_configuation_with_meta base_display_config_with_meta; struct display_configuation_with_meta optimized_display_config_with_meta; + struct dml2_dpmm_map_mode_to_soc_dpm_params_in_out dppm_map_mode_params; };
struct optimization_init_function_params {