In dw_pcie_iatu_setup(), the outbound ATU loop uses a pre-increment on the index and starts programming from 1, effectively skipping index 0. This results in the first outbound window never being configured.
Update the logic to start from index 0 and use post-increment (i++) when assigning atu.index.
Fixes: ce06bf570390f ("PCI: dwc: Check iATU in/outbound range setup status") Cc: stable@vger.kernel.org Signed-off-by: Krishna Chaitanya Chundru krishna.chundru@oss.qualcomm.com --- Note:- The fix tag shown above is for applying this patch cleanly, further below versions we need to manually apply them, If any one intrested to apply this fix then we can submit another patch based on that kernel version. --- drivers/pci/controller/dwc/pcie-designware-host.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index e92513c5bda51bde3a7157033ddbd73afa370d78..32a26458ed8f1696fe2fdcf9df6b795c4c761f1f 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -896,10 +896,10 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) if (resource_type(entry->res) != IORESOURCE_MEM) continue;
- if (pci->num_ob_windows <= ++i) + if (pci->num_ob_windows < i) break;
- atu.index = i; + atu.index = i++; atu.type = PCIE_ATU_TYPE_MEM; atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset; atu.pci_addr = entry->res->start - entry->offset; @@ -920,7 +920,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) }
if (pp->io_size) { - if (pci->num_ob_windows > ++i) { + if (pci->num_ob_windows > i) { atu.index = i; atu.type = PCIE_ATU_TYPE_IO; atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;