On Thu, Feb 14, 2019 at 08:50:43AM +0000, Alexey Brodkin wrote:
But that's pretty much the same for other 32-bit arches that have 64-bit atomics like ARM etc. From what I may see from ARM's documentation for LDREXD/SRREXD they require double-word alignment of data as well.
That said if for some reason atomic64_t variable is unaligned execution on any (or at least most) 32-bit architectures will lead to run-time failure, i.e. we'll know about it and this will be fixed.
On x86_32 we have cmpxchg8b that 'likes' 8b alignment, our atomic64_32 implementation has the explicit alignment in, however there __alignof__(unsigned long long) is actually 8, so it all works.
Even though the hardware (obviously) never really requires alignment, even for atomic ops (although that's coming, yay!).