From: Jayesh Choudhary j-choudhary@ti.com
[ Upstream commit cfdb4f7ffdb855c1a3d274dc7757e780dcbf2d55 ]
VP2 and VP3 are unused video ports and VP3 share the same parent clock as VP1 causing issue with pixel clock setting for HDMI (VP1). The current DM firmware does not support changing parent clock if it is shared by another component. It returns 0 for the determine_rate query before causing set_rate to set the clock at default maximum of 1.8GHz which is a lot more than the maximum frequency videoports can support (600MHz) causing SYNC LOST issues. So remove the parent clocks for unused VPs to avoid conflict.
Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support") Reported-by: Nishanth Menon nm@ti.com Signed-off-by: Jayesh Choudhary j-choudhary@ti.com Reviewed-by: Tomi Valkeinen tomi.valkeinen@ideasonboard.com Reviewed-by: Aradhya Bhatia a-bhatia1@ti.com Tested-by: Enric Balletbo i Serra eballetbo@redhat.com Link: https://lore.kernel.org/r/20240201142308.4954-1-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra vigneshr@ti.com Signed-off-by: Sasha Levin sashal@kernel.org --- arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts index 8da5915798688..370980eb59b02 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts @@ -918,13 +918,9 @@ &dss { pinctrl-names = "default"; pinctrl-0 = <&dss_vout0_pins_default>; assigned-clocks = <&k3_clks 218 2>, - <&k3_clks 218 5>, - <&k3_clks 218 14>, - <&k3_clks 218 18>; + <&k3_clks 218 5>; assigned-clock-parents = <&k3_clks 218 3>, - <&k3_clks 218 7>, - <&k3_clks 218 16>, - <&k3_clks 218 22>; + <&k3_clks 218 7>; };
&serdes_wiz4 {