The following commit has been merged into the timers/core branch of tip:
Commit-ID: af246cc6d0ed11318223606128bb0b09866c4c08 Gitweb: https://git.kernel.org/tip/af246cc6d0ed11318223606128bb0b09866c4c08 Author: Yang Guo guoyang2@huawei.com AuthorDate: Tue, 27 Sep 2022 11:32:21 +08:00 Committer: Daniel Lezcano daniel.lezcano@linaro.org CommitterDate: Tue, 27 Sep 2022 11:30:53 +02:00
clocksource/drivers/arm_arch_timer: Fix CNTPCT_LO and CNTVCT_LO value
CNTPCT_LO and CNTVCT_LO are defined by mistake in commit '8b82c4f883a7', so fix them according to the Arm ARM DDI 0487I.a, Table I2-4 "CNTBaseN memory map" as follows:
Offset Register Type Description 0x000 CNTPCT[31:0] RO Physical Count register. 0x004 CNTPCT[63:32] RO 0x008 CNTVCT[31:0] RO Virtual Count register. 0x00C CNTVCT[63:32] RO
Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL") Cc: stable@vger.kernel.org Cc: Daniel Lezcano daniel.lezcano@linaro.org Cc: Thomas Gleixner tglx@linutronix.de Cc: Marc Zyngier maz@kernel.org Cc: Mark Rutland mark.rutland@arm.com Acked-by: Marc Zyngier maz@kernel.org Signed-off-by: Yang Guo guoyang2@huawei.com Signed-off-by: Shaokun Zhang zhangshaokun@hisilicon.com Link: https://lore.kernel.org/r/20220927033221.49589-1-zhangshaokun@hisilicon.com Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- drivers/clocksource/arm_arch_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ff935ef..a7ff775 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -44,8 +44,8 @@ #define CNTACR_RWVT BIT(4) #define CNTACR_RWPT BIT(5)
-#define CNTVCT_LO 0x00 -#define CNTPCT_LO 0x08 +#define CNTPCT_LO 0x00 +#define CNTVCT_LO 0x08 #define CNTFRQ 0x10 #define CNTP_CVAL_LO 0x20 #define CNTP_CTL 0x2c